|Title : 3D Failure Analysis|
|Course Leader: Ingrid De Wolf, Prof.|
|Affiliation: imec, Belgium & KULeuven, Belgium|
In 3D stacked-IC technology, thinned Si wafers/dies are vertically interconnected offering faster and more compact electronic circuits with heterogeneous integration capabilities. The stacked wafers/dies are electrically interconnected using µ-bumps and Cu Through Silicon Vias (TSVs). However, the introduction of these new materials and new fabrication schemes is associated with new failure mechanisms requiring new failure analysis (FA) techniques. In addition, even for well-known failures in 2D-chips, pin-pointing the failure location becomes increasingly challenging because of a combination of inaccessibility of the devices (part of a 2.5D or 3D stack) with small dimensions and high density of the devices.
In this course, after a short introduction to 3D technology and failure analysis, various failure analysis techniques that can be used for FA of 3D technology are discussed in detail. Their principle is explained, the advantages and limitations for 3D technology-FA are discussed, and typical case studies are presented. The course will cover well known classical techniques, such as for example X-ray, scanning acoustic microscopy (SAM) and magnetic field imaging, but also new developments of these techniques. In addition, less conventional techniques (ex. lock-in thermography, polariscopy, EOTPR and some recent new electrical test-based techniques) will be covered.
- 3D technology
- short introduction to the technology (aim, TSV, micro-bumps, thinning and stacking, Cu pillars,…)
- overview of expected failure mechanisms in 3D technology
- Failure analysis
- what, why, 2D versus 3D
- failure analysis sequence
- Overview of 3D FA techniques (+ case studies)
- Infra-red microscopy
- X-ray based techniques
- Acoustic techniques (SAM, GHz SAM, acoustic signals)
- Magnetic field/current imaging methods
- TDR and EOTPR
- Photon emission microscopy
- Lock-in thermography
- New e-test based techniques
Biography: Ingrid De Wolf received the PhD in Physics from the KU Leuven university, Belgium, in 1989. In the same year she joined imec in Belgium, where she worked in the field of microelectronics reliability, with special attention for gate oxide reliability, mechanical stress analysis using micro-Raman spectroscopy and failure analysis using emission microscopy. From 1999 to 2014, she headed the group REMO, where research is focused on reliability, test and modelling of 3D technology, interconnect, MEMS and packaging. She managed to grow this group from a small team of 3 members to a highly recognized group of about 40 people which is involved in several programs within imec (3D, interconnect, Optical IO, GaN, Litho, PV, MEMS, STT-MRAM…). She authored or co-authored 14 book chapters and more than 350 publications of which ~30 invited, and won several best paper awards at conferences focusing on reliability and failure analysis (ESSDERC, ESREF, ISTFA, EOS/ESD symposium, IEDM). She was often involved as session chair or technical committee member of these conferences, and is member of the steering committee of ESREF. She is chief scientist at imec, IEEE senior member and professor at the department of Metallurgy and Materials Engineering of the KU Leuven where she teaches courses on non-destructive testing, MEMS reliability and failure analysis, characterization techniques and FMEA.