Li Ming : Materials and Processes of Fan-out Wafer/Panel Level Packaging

Title :Materials and Processes of Fan-out Wafer/Panel Level Packaging liming
Invited Presentation: Li Ming
Affiliation: ASM

 

The presentation will focus on the design, materials, process, and equipment of fan-out wafer/panel-level packaging (FOWLP or FOPLP). Various FOWLP formation methods such as chip-first with die-up, chip-first with die-down, and chip-last (RDL-first) will be introduced. Several key process technologies, such as die pick & place, molding, redistribution layer (RDL) and solder ball mount will be discussed. Since warpage control is a critical issue for the process, effects of various factors, such as molding material property, chip size, EMC thickness and package fan-out ratio, on the wafer/panel warpage will be studied. Based on the applications, different RDL process (Cu damascene, polymer thin film, or printed circuit board (PCB) approach), RDL line/width, dielectric thickness, and equipment involved will be recommended and summarized

Biography

Li Ming was awarded BSc and MSc in Materials Science and Engineering by Shanghai Jiao Tong University, China, and earned her PhD in Materials Science from the University of London, UK. Before joining ASM in June 2004, Dr. Li Ming worked in the University of London (UK), the Institute of Materials Research and Engineering (Singapore), and Chinese University of Hong Kong (Hong Kong). Currently, working in ASM as a R&D Director for Enabling Technology, Dr. Li is heading the Process and Packaging Technology Development Team to improve current processes and explore advanced packaging technologies. Dr. Li has published more than 70 papers in leading journals & technical conferences.