Kenji Otsuka: How to Feed Enough to Greedy IoT Monster

How to Feed Enough to Greedy IoT Monster
Kanji Otsuka
Meisei University


IoT changes greedy monster now-a-day. That seems to be uncontrollable world. Mega-data centers (DC’s) are trying to catch the monster mainly in the US. These systems included even edge center ones are in blind as like fog weather because the DC’s providers have been developed by own inside technologies. In our historically seen, the concept has been undergoing as “high-end technologies automatically shift to low-end ones”. So we want to know what the blind out. In my experiences, some of specific examples show by that could reveal the blinds and get the evidence.

The most important element on their thought is communication bandwidth that is directly affected the data processing performance and communicating each other. The way for getting wider bandwidth involves three approaches which are high speed clocking, many lanes and high data compression. The first two issues relate with packaging technology which would be presented some. We additionally consider data compression technology. The system performance balance should put together the three issues. Let’s focus in the three issues now.

While power saving is another one of the most important things in not only DC’s but mobiles. Higher bandwidth introduces saving power that we should know. Architecture of data processing with low power is managed by packaging issues which focus in also.

If you well done of it, the world’s highest-volume IoT platforms, the largest commercial health data clouds, the largest commercial video platforms and so on even in mobile fields could be taken as far as technological basis.



Kanji OTSUKA, Graduated the Kyoto Institute of Technology in 1958.
Receiving doctor grade of material science from Tokyo Institute of Technology.
IEEE Fellow in 1998.

Job functions;

Hitachi Ltd., from 1959, since thirty four years, in semiconductor group firstly. That was dawn period for semiconductor technology, so learned from solid-state physics to basic production process with original technology development. And also charged in computer technologies belong main-frame group late of the period especially in high speed IO interface circuit and CPU-memory interconnection. Then large system design technology got for his knowledge. In such job experiences, having wide technologies in materials, wafer processing, packaging, circuit technologies and system design for the semiconductors and computers.

Since 1992, Meisei University, Faculty of Informatics, Dept. of Electronics and Computer Science as a professor. Also the Director of Graduate of Informatics from 1999 to 2000, and Dean of Faculty of Informatics from 2001 to 2003.

Current position; executive researcher and emeritus professor of Meisei University from 2006, Invited Professor of Osaka University (2011-now) and Guest Instructor of the University of Tokyo (2011).

His recent job; in the large system so-called concurrent total system design with high speed processing logic, memory LSIs and including wafer processing, packaging and materials.