Series of Hot Topics

EPTC 2016 bring out several hot topics in the industry.


Through Silicon Vias (TSV) technology was adopted in production a few years ago for MEMS and CMOS Image Sensors (CIS). Driven by consumer applications such as smartphones and tablets, this market have grown over the last several years. 3DIC adoption & implementation has been seen for high-end memories (HBM/HBC) from 2014. Standards have now been established, the industry has grown in high-volume manufacturing. Wide I/Os,  logic-on-logic will follow, and Heterogeneous 3DIC nowadays is heating up. EPTC 2016 has lined up short courses on 3DIC integration / 3DIC Packaging & FA methods for 2.5D/3DIC and invited papers / speakers to present on the TSV / 3DIC  integration on Advanced technology node. Full details are in the subsequent pages. Download speaker line up here.



Autonomous driving, Clean & Green and connectivity & entertainment driving the growth of electronics contents in the automotive industry.  Many of the new functions requires new unique packaging requirements.   The new packaging needs extended hours at high temperature operation thus requires more robust materials, assembly processes and higher reliability compare to consumer products. Deeper temperature cycles in use case requires higher board-level reliability. EPTC 2016 have line up a keynote and an invited speakers to present on the automotive packaging.  Full details are in the subsequent pages. Download speakers line up here


In 2015, China imported nearly 70% of the world’s chips with about $230 billion dollars, which is more than the spend on crude oil. To change this situation, several plans, e.g. “Made in China 2025” (MIC 2025), were published by China’s State Council recently, to invest more than $100 billion in the semiconductor industry to reach its goal of playing a larger role in the global market. With the MIC 2025 plan, China is aiming to improve the self-sufficiency rate for ICs in the nation to 40% in 2020, and boost the rate further to 70% in 2025.

How these policies and investment will impact the current semiconductor industry? What’s the Opportunities & Challenges for the packaging community? EPTC has set up a panel session to explore the answers: “Rise of China Semiconductor”. There are also invited presentations to demonstrate current state-of-art of advanced packaging development in China. Download speakers line up here




The Internet of Things (IoT) is the network of physical objects or “things” embedded with electronics, software, sensors, and network connectivity, which enables these objects to collect and exchange data. The size and cost of electronic components that are needed to support capabilities such as sensing, tracking and control mechanisms, play a critical role in the widespread adoption of IOT for various industry applications.  EPTC 2016 has lined up a keynote speaker, 2 PDC courses, and series of invited papers & presentations to present on the internet of things from packaging perspective. Full details are in the subsequent pages. Download speakers lineup here.



The mobile market is accelerating demand for more compact and complex semiconductor packages that are challenging traditional packaging technology in the areas of form factor, reliability and performance. This demand is driving the quick growth of conventional Fan-In wafer level packages (WLP), with estimated CAGR of 9% from 2014 to 2019. In another respect, the demand for high density interconnection, superior electrical performance and the ability to integrate multiple heterogeneous is driving the growth of new Fan-Out WLP, which is projected at CAGR of 87% from 2015 to 2020(from Techsearch)!

EPTC 2016 has lined up short courses on Fan-In Fan-Out WLP Packaging and 2 invited speakers to present on the advanced Fan-Out WLP. Full details are in the subsequent pages. Download speakers line up here



Heterogeneous Integration Roadmap Workshop, December 2nd, 2016

Heterogeneous Integration Roadmap Workshop

Our Industry has reinvented itself through multiple disruptive changes in technologies, products and markets. We now face new challenges with the slowing of Moore’s Law, the migration o to the Cloud, smart devices everywhere, and Internet of Things to Inbternet of Everything. While the pace of innovation is increasing to meet these challenges, the crucial question is will be the winning directions going forward?

The Heterogeneous Integration Roadmap (HIR), initialed by the IEEE CPMT Society ,and joined with IEEE EDS and Photonics Socidties and SEMI, will follow directly the purpose, process and format of the ITRS Heterogeneous Integration Roadmap (last ITRS 2.0 edition published on July 8th 2016)  for the 15-year assessment of  future requirements. This Heterogeneous Integration Roadmap  will continue the ITRS Heterogeneous Integration and Assembly and Packaging roadmapping workshops held in previous years at ESTC and other CPMT Conferences, while expanding the vision to address the major changes in the market place, and the disruptive changes in technology and the industry.   We invite  EPTC participants to attend this important working session for our profession, our industry and our research community.

Instructor’s Biography


William Chen (Bill) currently holds the position of ASE Fellow and Senior Technical Advisor at ASE Group. Prior to joining ASE, he was the Director at the Institute of Materials Research & Engineering in Singapore. Bill retired from IBM Corporation after a career spanning over thirty years in various R&D and managerial positions. He has held adjunct and visiting faculty positions at Cornell University, Hong Kong University of Science and Technology, and Binghamton University. Bill is the chair of the newly formed Heterogeneous Integration Technology Roadmap for Semiconductors, an initiative addressing technologies for the IoT, IoE and cloud computing era,  jointly sponsored by IEEE CPMT, SEMI and EDS.  He also chairs SEMI’s Advanced Packaging Committee. In 2009, Bill received the InterPACK Excellence Award for his contributions, and in 2010, he was presented with the IEEE CPMT Society David Feldman Outstanding Contribution Award. He is a past President of the IEEE CPMT Society and he has been elected a Fellow of IEEE and a Fellow of ASME. Bill received B. Sc. from London University, M.Sc. from Brown University and Ph.D. from Cornell University.


Wilmer R. Bottoms, Ph.D

Dr.  Bottoms received a B.S. degree in Physics from Huntington College in Montgomery, Alabama in 1965, and a Ph.D in Solid State from Tulane University in New Orleans in 1969 and is currently Chairman of Third Millennium Test Solutions. He has worked as a faculty member in the department of electrical engineering at Princeton University, manager of Research and Development at Varian Associates, founding President of the Semiconductor Equipment Group of Varian Associates and general Partner of Patricof & Co. Ventures. He has served as Chairman and CEO of Several Companies both public and private.

Dr. Bottoms has also served in a number of Government Advisory positions including Chairman of the Board on Assessment for NIST and a member of the Technical Advisory Committee on export controls for the US Commerce Department.

Dr. Bottoms currently serves as:

  • Emeritus Member of the Board of Tulane University
  • Co-Chair of the Heterogeneous Integration Roadmap
  • Chairman of the SEMI’s Awards Committee
  • Chairman of the Packaging and Package Substrates Technical Working Group for INEMI
  • Member of the Board of MIT’s Microphotonic Center
  • Chairman of APMT
  • Chairman of Third Millennium Test Solutions